Special Manpower Development in VLSI and Related Software

MHRD - Ministry of Human Resource Development
UGC - University Grants Commission
AICTE - All India Council for Technical Education

Indian Institute of Technology, Bombay
Indian Institute of Technology, Delhi
Indian Institute of Technology, Kanpur
Indian Institute of Technology, Kharagpur
Indian Institute of Technology, Madras
Indian Institute of Science, Bangalore
Central Electronics Engineering Research Institute, Pilani

Institute of Technology, Banaras Hindu University, Varanasi, Uttar Pradesh.
Indian Institute of Technology, Roorkee, Uttar Pradesh.
Thapar Institute of Engg. and Tech., Patiala, Punjab.
Karnataka Regional Engineering College, Surathkal, Karnataka.
Regional Engineering College, Warangal, Andhra Pradesh.
PSG College of Engineering, Coimbatore, Tamil Nadu.
Malviya Regional Engineering College, Jaipur, Rajasthan.
Visvesvaraya Regional College of Engineering, Nagpur, Maharashtra.
GS Institute of Technology and Science, Indore, Madhya pradesh.
Bengal Engineering College, Howrah, West Bengal.
Jadavpur University, Calcutta, West Bengal.
Regional Engineering College, Rourkela, Orissa.

Instruction Enhancement Programme (IEP)

The VLSI Manpower Development Project recognizes that the faculty is the most dominant player in the educational process and constitutes the key factor in bringing about improvement in the quality of learning at the colleges. Further, as the technology changes very fast, the skills of the teachers, even if well qualified, need to be constantly updated. In addition, the supporting laboratory staff of the Engineering College who also play an important role in the proper training of students, need to update their knowledge. Therefore, there is a strong need for organizing a series of intensive course oriented towards updating of practical skills of both teachers and supporting staff. To ensure desired upgrading of faculty competence, the Instruction Enhancement Programme component is included in the project. The Quality Improvement Programme (QIP) and other short-term courses of Ministry of Human Resource Development (MHRD) are aimed at providing promotional avenues. IEPs on the other hand cover the subject matter, and topics like teaching skills, student projects, laboratory development, laboratory exercises etc. The goal of IEP are:

1. Upgradation of subject competence and teaching skill
2. Improvement of interaction with students and with industry and fostering better academic discipline.

The Resource Centres organize Instruction Enhancement Programmes (IEPs) for the faculty of the Participating Institutions on the Learning Material Developed at the RCs. The duration of these programmes is two weeks. A part of the programme is used for exposing them to a variety of software tools and on presentation methods and skills. Industry visits for the visiting faculty are also organized wherever possible. Feedback is also collected from the participants on different aspects of the programme at the end.

To summarize, the Responsibilities of the Resource Centres are:

1. Conducting Instruction Enhancement Programmes (IEPs) for the faculty of Participating Institutions (PIs).
2. Preparation of Lecture Materials (LMs) for PIs.
3. Training Programme for lab technicians of PIs.
4. Conducting industrial seminars on leading products and tools. This is to improve the participation of industry and get projects from industry.
5. To assist the PIs in industry interaction so that the students work on industry related projects.
6. Assisting PIs in starting M.Tech. programmes.
7. Support PIs to conduct Continuing Engineering Education Programme (CEEP) for Industry Personnel.
8. Monitoring the implementation of the project activities at PIs.

Apart from this the Resource Centres and the Participating Institutions were required to conduct ZOPP Workshop, develop and review the Lecture Materials, conduct India Chip Programme, and most importantly market India abroad as a "VLSI Design Destination". They were also required to install and commission hardware and software and procure furnitures, books and journals that was needed for this programme. The PIs who get trained by the RCs are in turn expected to offer VLSI related elective courses in their respective institutions at the B.E, M.E or at Ph.D levels with the following project phase guidelines:

The phasing guidelines of the project:

Phase I (1st and 2nd year): Start VLSI related electives in B.E/B.Tech. programmes.
Phase II (2nd and 3rd year): Start VLSI related electives at M.Tech. programmes in disciplines other than Microelectronics/VLSI Design.
Phase III (3rd, 4th and 5th year): Start M.E./M.Tech. in Microelectronics/VLSI Design.

Thus, these activities are expected to generate the required manpower in the growing field of VLSI design in the country at various levels (B.E/M.E/Ph.D) thereby meeting the requirements of the Indian VLSI industries.

(1.) Official document from the Department of Information Technology, Government of India

(2.) K. C. Shet "Manpower Developement in VLSI in India: A Case Study," Proceedings of IEEE International Conference on Microelectronic Systems Education (MSE'03), Anaheim, California, June 1-2, 2003.

ABSTRACT: In this paper a review of development of manpower in VLSI in India is attempted. In the last decade of the 20th Century, rapid strides have been done in Micro-Electronics in India. Both private and public institutions have accelerated the growth of VLSI, Chip design and embedded systems including DSP.

Copyright (c) 2003 Institute of Electrical and Electronics Engineers (IEEE), Inc. All rights reserved.