Institute of Technology, BHU
Department of Electronics Engineering
Here are some ideas that can be implemented as final year projects (BTP). Second and third year students are also encouraged to implement some of the projects as part of their curriculum or independent projects. Further queries regarding a specific project should be directed to the person who has submitted the project. In case of difficulty, please feel free to contact us.
ECE Design Project Ideas from the University of Waterloo
Title of the project Receiver
Description Design a true LVDS(IEEE standard) Receiver for 200MHZ clock rate.
submitted by Parmanand Mishra
Online Documents: (1.) IEEE Standard for Low-Voltage Differential Signals (LVDS) for Scalable Coherent Interface (SCI)
(2.) A. Boni, A. Pierazzi and D. Vecchi, "LVDS I/O Interface for Gb/s-per-Pin Operation in 0.35-um CMOS," IEEE Journal of Solid-state Circuits, vol. 36, no. 4, April 2001.
SPICE Models and Process Information: TSMC 0.35 micron CMOS process (SPICE models, process and device details)
Tools: P-SPICE Student Version Download and Tutorial
Recommended Books: (1.) Behzad Razavi, "Design of Analog CMOS Integrated Circuits," McGraw-Hill, Boston, MA, 2001.
(2.) David A. Johns and Ken Martin, "Analog Integrated Circuit Design," John Wiley & Sons, New York, NY, 1996.
Title of the project Low Power SRAM Design in CMOS
DescriptionThis project implements a low-power Static Random Access Memory (SRAM) in CMOS.
submitted by Nitin Mohan
The top level specs are:
- 8 bit Address
- 16 bit Data In
- 16 bit Data Out
- Chip Select input to enable the SRAM chip
- Output Enable input to enable the
tri-stated data out pins
- Write Enable input to differentiate read
and write operations
- Total capacity = 2^8 x 16 = 4096 bits = 4 Kb
- Internal Architecture (Flexible): An
array of 64x64 bits
Description: 8 bit address is divided into
two parts 6 bits for row decoder (to generate
64 Wordlines) and 2 bits for column
decoder (to select one out of four 16 bit
data out). One of the efficient implementation
of the row decoder can be two-stage decoder.
The wordlines can be pulse based instead
of voltage level (for low power operation).
The design can be synchronous (with clock)
or asynchronous (without clock).
Recommended Books: (1.) Jan M. Rabaey*, "Digital Integrated Circuits: A Design Perspective", Prentice Hall, NJ, 1996. (Online Material First Edition and Second Edition)
(2.) Ken Martin*, "Digital Integrated Circuit Design", Oxford University Press, NY, 2002.
(3.) Neil H. E. Weste and Kamran Eshraghian, "Principles of CMOS VLSI Design: A System Perspective", Addison-Wesley, 1993.
Online Documents: (1.) Bharadwaj S. Amrutur, "Design and Analysis of Fast Low Power SRAMs," Ph.D. Thesis, Stanford University, CA, 1999.
(2.) Mark A. Horowitz, "Timing Models for MOS Circuits," Ph.D. Thesis, Stanford University, CA, 1984.
(3.) Other miscellaneous publications from Stanford University, CA.
(4.) Modern VLSI Design by Wayne Wolf
CAD Tools needed:
Simulation and Layout: Cadence.
Simulation (optional): SPICE/Any circuit simulator that can simulate MOS circuits.
Layout (optional): Magic/IC Editor/Any layout tool.
Design Tasks: Background Study for SRAM, CMOS circuit styles, Design, Analysis, Pre-layout simulation, Layout, Verification (DRC and LVS), Parasitic extraction, Post-layout simulation, Documentation
Duration: 3-6 months for a group of 2-3 3rd/4th year B.Tech. students
* We have shipped two copies of each book (Rabaey, and Martin) to the department. If interested, please check the departmental library to have a reading.
Title of the project Repeater insertion for Long Interconnects
DescriptionThis project involves the simulation of long
submitted by Manoj Sinha
on-chip interconnects used for point-to-point
communication. The interconnect delay increases
quadratically with the increase in its length.
Uniform repeater insertion is one of the ways
to make the quadratic dependence into linear
with respect to line length.
Modeling Requirements:
1. Select higher level metal line of a
chip (Metal 3 and higher) for obtaining
the model.
2. Consider line length of 3mm-10mm for
different simulation.
3. Model the interconnect as pi-3 or pi-5
distributed model for accuracy rather than
lumped RC model. You can compare the difference
in the delay for these two models for same
line length using simulation.
4. Uniform Repeater insertion involves breaking the
long line and make the quadratic dependence
to linear.
This project can be started by students in
a group of 2-3. To begin with study the
basics from Chapter 8 in J. Rabaey book (the
reference is given below).
The interconnect and MOS model can be obtained
from UC, Berkeley website at:
http://www-device.eecs.berkeley.edu/~ptm/interconnect.html
Reference: 1. J. M. Rabaey, "Digital Integrated Circuits",
Wiley Eastern Publications, 1996.
I can provide with many more references, when
the project begins.
N.B: Interconnect is one of the hottest
problem in high-speed design. Lot of
research is underway to improve speed and
reduce power consumption.
Title of the project "SPICE-like Circuit Simulator"
DescriptionThis project implements a SPICE-like circuit simulator for linear circuits.
submitted by Nitin Mohan
The simulator can be implemented in C/C++/Matlab or any other programming language.
The simulator should support time-domain analysis, frequency-domain analysis and sensitivity analysis.
The outputs should be displayed in graphical form.
The input circuit file can have circuit elements such as resistance, inductance, capacitance, independent current/voltage source,
voltage (current) dependent voltage (current) source and basic operational amplifier.
The SPICE-like syntax can be followed e.g. R 1 0 0 0 20000 means a resistance of 20k between nodes 1 and 0.
In the case of voltage (current) dependent voltage (current) source 4 nodes must be specified.
For a one port element (e.g. R, C etc) the last two nodes should be ignored.
The end of input file can be specified by a negative number (-1 etc.).
Equations for a given circuit can be formulated using modified nodal analysis.
A system of linear equations can be solved by LU decomposition and forward/backward substitution methods.
For the reasons of accuracy and to avoid the "divide by zero" problem, full pivoting algorithm should be implemented.
If you are using Matlab or similar mathematical package, built-in functions to perform the above matrix manipulations should not be used.
If you choose to implement this project as part of your B.Tech. project, the project can be extended to include non-linear devices (diodes/transistors).
Newton-Raphson method can be used to solve a system of non-linear equations.
The time domain analysis of non-linear circuits will require iterations using one of the implicit integration methods (e.g. Euler Backward, Trapezoidal method etc.).
Also the initial conditions should be included to reach the convergence in non-linear circuits.
If you need more information and guideline about this project, you can contact me.
Have Fun !!!
Recommended Book: "Computer Methods for Circuit Analysis and Design", J. Vlach and K. Singhal, Chapman and Hall, Second Edition.
Software Tools: Any programming language (C/C++/Fortran etc.) compiler or any mathematical package (Matlab/Mathcad/Mathematica/Maple etc.)
Duration: 3-6 months for a group of 2-3 2nd/3rd year B.Tech. students. 4th Year students can include the non-linear circuit elements to make the project more advanced (suitable for BTP).
Title of the project Alumni Projects
DescriptionHi,
submitted by Anshuman Singh EE 98
Alumni of the other departments are also thinking on the same lines it would be nice we could put overall infrastructer in place
Title of the project Setup LAN inside Rajputana
submitted by Rajeev Srivastava
DescriptionTo network all 200 rooms in Rajputana using distributed router configuration and single server model. The router is controlled by a powerful linux machine.
Title of the project Software Defined Radio.
DescriptionThe Aim of the project will be to design and develope a software defined radio. Where RF and LNA phase are in external hardware and rest of the processin is done on a general purpose processor.
submitted by Rohit Joshi
This kind of system will be very useful in developing the future 4G wireless networka dn terminals.
For the sake of this project the general purpose processor can be your PC and first project can be taken as AM Medium wave radio. Later on you can enhance this to be multipurpose radio.
You can get some guidence from the GNU Radio project and also from some of the university projects. For e.g http://www.dsp.sun.ac.za/sdr/content.php?menu=8&page_id=1. There are also few examples and papers explaining the scope in IEEE communication magazine.
I would be more the happy to pitch in with my contribution in this as and when required.
Title of the project A Particle filter based tracking of known shaped objects in video
DescriptionThis project is aimed towards introducing senior year students in ECE and CSE to stochastic signal processing algorithms like Particle filters. Their application to real-time computer vision tasks such as template based tracking. The initial part of the project involves implementation of a particle filter based tracker to track a car in a monocular sequence of 10min (at a frame rate of 30Hz!) duration. The tracker should have near real-time performance, and a very low failure rate. The expansion of the project is to then perform multi-modal tracking of cars on a highway.
submitted by Abhishek Sharma
Once the implementation of the particle filter is in place, its application can be extended to track multiple objects like human gait, motion of bees (called the humming bees), human faces -under constant illumination. The extension of this project to some real application like tracking in bad-weather is a candidate of a good publication in an image/video processing workshop of international standard.
Requirements: good knowledge of stochastic algorithms like Kalman filters, Particle filters. Basic image processing.
Skills in C/C++ and use of open source vision libraries Intel OpenCv.
Interested people can get in touch with me by sending me an email at: abishek.sharma@gmail.com; -- no spam please.
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Title of the project sub marine
submitted by ramesh
Descriptionwhen we makes a sub marine with refractive index of sea water
Title of the project sub marine
submitted by ramesh
Descriptionwhen we makes a sub marine with refractive index of sea water